تراشه CD4541 پکیج DIP

Specification

Display blanking of all illegal input combinations
Latch storage of code
The capability of driving two low power TTL loads, two HTL loads, or one low power Schottky load over the full rated-temperature range
Pin-for-pin replacement for the CD4056B (with pin 7 tied to VSS)
Direct LED driving capability
100% tested for quiescent current at 20 V
Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
Noise margin (full package-temperature range)
1 V at VDD = 5 V
2 V at VDD = 10 V
2.5 V at VDD = 15 V
5-V, 10-V, and 15-V parametric ratings
Meets all requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ’B’ Series CMOS Devices”